Chipset or chips:》》》 How to design??????

Chipset or chips these are main component of any electric device. Today these are very common and saw in every electric device example saw in your tv remote control. In this post I discussed about what is chipset and how they design, it works etc.

Introduction:

A number of integrated circuits design to perform one or more related functions. For example, one chipset may provide the basic functions of a modem while another provides the CPU functions for a computer. Newer chipsets generally include functions provided by two or more older chipsets. In some cases, older chipsets that required two or more physical chips can be replaced with a chipset on one chip.
In a simple language the work of chipset is like their is a team of men and they done a job. In a team job is done frequently and accurate. So basically a single man is chip and whole team is called chipset.

How to design chips:

Before designing the chip first built structure of chip and brain storm for example:

》What market is the Chip targeted for?

》What are the Protocols involved in the Chip?

》What is going to be our Processor/Bus Architectures?

》what is the power/IR-drop/timing/Area/Yield/ targets and how to budget it in the Chip?

》What is the process in which the Chip going to be manufactured?

》what are the various third party IP's/Memory requirements?
》what is our Design flow and EDA tools and methodology involved?

When ever we start to construct a building, we will have an architecture, how the building should look like , the exterior looks and all, similar to that we will be designing an architecture in the chip-design, based on the requirement of the product, what the product is addressed for and whom to serve what needs, the so called specification, will having the modules.

Now lets go in to the implementation part of both the Building & Chip.

We at first come with the floorplan of the building, similarly we come with the floorplan of the Chip, Based on the connectivity/accessibility/vaasthu we place our rooms, similarly we have the constraints to place the blocks. Like we build the building with bricks, for Chip Design we have libraries, which are like pre-designed bricks, for a specific functionality.

Now let us try to understand the power-structure or electrical connectivity in our Building. Initially we have an Electrical plan for our building, where we have a requirement that all our electrical gadgets needs to get power. Similar to that we have a Chip power requirement, The required power is supplied through the power-pads, over a ring like topology to have a uniform distribution across all corners of the chip, and the supply has to reach all the standard-cells(bricks for Chip-Designing).,this is called as power-grid topology in the Chip-Design, now the requirement is how well we design our Power-grid, to reduce the IR-drop so that our standard-cells get proper power requirement.

I would not make justice, if I don't discuss about clock and clock-tree in the Chip-Design flow. We have synchronous way of designing and asynchronous way of designing(difficult to verify). Majority of chips follow Synchronous way of coding, for which Static Timing Analysis is possible. For the relevancy of the flops the clock to those flops should reach at the same time from the crystal, with in some skew targets with in the chip.In order to make this happen, a step called as clock-tree is performed after power-grid is created.

Let us try to visualize the concept behind Place & Route in Chip Design. We need to undergo lot of modelling concepts, to understand the process of Chip-Designing. To have a better understanding of this concept of place and route, let us assume a society where people who are speaking different languages are living , and let us visualize that people talking of the same languages are living in a community, then the communication is much easier , similar way in the chip-designing, the standard-cells who are having design relation-ships, are placed closer in the Placement flow this concept is called as regioning. Now with in the regioning, of the groups of the standard-cells, the cells which are really sharing data, has to placed close-by so that there timing is achieved and well optimized.This step is called placement, Connectivity across the standard-cells is called as routing, the challenge is having optimized or reduced wire-lengths.

Now let us try to try to understand the concept behind signal integrity in the Chip-Design , often called us SI Effect. As our process is shrinking day by day, and our silicon-realestate is costly, we try to accommodate more and more standard-cells in the limited area, so the cells are placed in very close proximity, so the switching of one can have an impact over the others behaviour, which can make the path to be faster or slower, this issue is called as signal-integrity. So similar way in our construction in order to maintain the integrity with in the house(neighbour free-zone), within the limited zone of modurality, we try to create fences, across buildings, similarly we can think of a concept called as Shielding, the high frequency signal net with the power-nets running across. We perform spacing across the buildings, similar way we can perform spacing across the nets, which are in close proximities.

In order to validate the silicon from the manufacturability issues, the concept in the Chip Designing is Design for Test(DFT). One of the DFT techniques is scan-chain. To understand the concept of the scan-chain, we can visualize that we have a front-door entry and a back-door exit, and a person passes from the front-door and exits from the back-door exit of the building, that we are sure that there is no blocking within the rooms in the building, to make that person stuck , similar to this analogy the flip-flops are connected together creating a scan-chain and test-input values are passed from the scan-chain input of the chip and expected data is visualized in the scan-chain output of the chip, then the assumption is the chip is free from manufacturability issues like stuck-at faults(stuck-at one or stuck at zeros).

After design the chip we have need software for
give the brain to chip. We have use C and C++ for coding . Basically design the algorithm flow how it works and implement in the coding.

Market of Chip industry :

There are lots of leading industries in chip manufacturing market Intel, Samsung Qualcomm, Honour, Brodcomm etc. China and South Korea are the hub of manufacturing the chipset.
Manufacturers are work on 7nanometer to 16 nanometer chipset technology this thing makes our electronic devices are smaller and accurate.
This is projects in our computers , mobile phones and all other electronic devices.

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@aneesh23