SCIENCENEWS #3. Physicists have come up with an integrated circuit for a quantum computer.

                           

All quantum computers suffer from errors that arise during the computation and exchange of information between qubits and the outside world. Now scientists have already figured out how to deal with these errors, but all methods of error correction require a universal platform on which to place and connect among themselves a large number of qubits (about one hundred million). To do this, we need some kind of analogue of the integrated circuit, which is used to combine classical computing elements.

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A group of scientists suggested a method by which to build such a scheme. As a basis, they took CMOS technology, used in the vast majority of modern digital microcircuits. In the technology used between the layer of conventional transistors and a layer of qubits is an intermediate layer of silicon oxide. Through it pass the metal wiring, which connect the transistors with the qubits. Exchange of information between parts of the circuit and communication with the "outside world" is carried out through another layer located above the layer of transistors.

Source The proposed scheme, uniting 480 qubits.

The qubits in this scheme are quantum dots in which the states of a single spin are "stored". The information from the qubit is read using the Pauli spin blockade, which prevents electrons from passing through the point. For each qubit there are six transistors, because of the circuit features, the physical size of one such block is approximately equal to 63 × 63 square nanometers (although it does not have to be square). At the moment, some companies can already produce small enough transistors to keep within this size. For the convenience of correcting errors, scientists proposed to combine single-block units into modules of 480 pieces.

Correcting the errors that arise during quantum computing, physicists have proposed using the surface codes method. In this method, one qubit is replaced by six: the two qubits are responsible for storing the information and four more for exchanging this information with the transistors. With the help of certain operations, the circuit copies the state of one of the two "memory qubits" into two "measuring qubits", the state of which is read by classical methods and transmitted to other parts of the circuit. This avoids the destruction of the quantum state when reading information directly from the "memory qubit". In addition, the circuit constantly compares the states of two "memory qubits" to track random errors.

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In addition, the researchers estimated how much heat will be allocated during the work of the proposed scheme, that is, checked whether it will be possible to implement it at the current level of cooling technologies. It turned out that with a frequency of operations of the order of 0.1 megahertz, about 50 nanowatts of heat would be released in each cell. Existing cooling technologies can provide heat removal of about 500 nanowatts per Kelvin from such a cell, that is, the circuit can in principle be cooled to a temperature of 0.1 Kelvin. On the other hand, for the full operation of qubits, a temperature of the order of one Kelvin is required. It turns out that it is possible to maintain the temperature acceptable for the operation of the circuit even at the current level of cooling technologies.